The present invention relates to the art of demodulation of frequency modulated signals, and more particularly to a system for generating coherent phase measurements of any signal whose frequency is modulated so that a predetermined amount of phase shift occurs in selected time intervals.
Frequency shift keyed (FSK) modulation techniques are commonly used in digital signaling over microwave radio links. In these applications, multilevel FSK with narrow deviation is currently preferred because of the relatively compact frequency spectrum occupied thereby.
In FSK systems, the carrier is shifted between two or more discrete frequencies in accordance with the value of a modulation input signal. In the simplest, binary case only two frequencies, commonly referred to as mark and space frequencies, are required. Each frequency denotes one of the two possible input states, i.e. a binary "1" or "0". In multilevel FSK, the amount of information which can be communicated over the link is expanded by increasing the number of frequencies which can be transmitted in each signaling interval. In 4-ary FSK, for example, any one of four discrete frequencies may be transmitted at any given time, allowing coded transmission of two digital bits at a time.
Multilevel FSK is not easily demodulated, however. One method which has been successfully used in the demodulating of multilevel FSK signals involves the coherent detection of the phase of the incoming FSK signal with respect to a reference signal. The coherent phase measurements so produced are then used to determine the amount of phase shift which occurred over the signaling interval. Since phase shift is porportional to frequency shift, it can be used to determine the data content of the signal. A multilevel FSK modulation/demodulation system of this type is described in a paper entitled "FM-CPSK Narrow Bank Digital FM with Coherent Phase Detection" by D. M. Brady, found in the 1972 International Conference on Communications.
In current practice, a controlled RF oscillator is used to establish a coherent reference for the purpose of detection of the phase of the FSK signal. This is usually accomplished by means of a quadrature phase detector. In these systems, the RF reference frequency must be carefully adjusted and controlled to avoid any frequency drift. Such drift would produce corresponding offsets in the detector output signal, thereby increasing the probability of error in the data subsequently recovered therefrom.
It is an object of the present invention to provide a coherent phase detector for use in the demodulation of frequency encoded signals and which does not require the generation of a coherent reference signal.
It is an additional object of the present invention to provide apparatus for baseband processing the output of a frequency discriminator to obtain coherent phase measurements.
It is yet another object of the present invention to provide a baseband processor having feedback loops for removing gain and DC offset error components from the baseband signal.
In accordance with the present invention, apparatus is provided for demodulating a frequency encoded signal. A frequency discriminator is provided for reducing the incoming signal to baseband. This baseband signal is then error corrected by a baseband processor.
In accordance with another aspect of the present invention, a baseband processor is provided for correcting error components in the baseband signal. This baseband processor includes feedback loops for correcting the DC offset and gain of the baseband signal.
In accordance with a more limited aspect of the present invention, the error components in the baseband signal are detected by providing an analog-to-digital convertor which responds to the magnitude of the baseband signal to provide a corresponding digital signal at the conclusion of each bit interval. The system is calibrated so that the least significant bits of this digital signal will assume predetermined values when the DC offset and gain of the baseband signal are correctly adjusted. Apparatus is further provided for utilizing the least significant bits of the digital signals to generate DC level correction and gain correction signals. These correction signals are fed back to previous stages in the baseband processor to provide error correction thereof.
In accordance with yet another aspect of the present invention, a baseband processor is provided having means for correcting the system gain by cross-correlating the hard-limited baseband signal with the error component of the baseband signal to generate a gain correction signal to be used to adjust the gain of the system. Means are also provided for introducing a delay in this cross-correlation process so as to avoid the production of inaccurate gain correction signals as a result of interbit crosstalk.